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Nordic Semiconductor /nrf52820 /GPIOTE /CONFIG[7]

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Interpret as CONFIG[7]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disabled)MODE 0PSEL0 (None)POLARITY 0 (Low)OUTINIT

POLARITY=None, OUTINIT=Low, MODE=Disabled

Description

Description collection: Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event

Fields

MODE

Mode

0 (Disabled): Disabled. Pin specified by PSEL will not be acquired by the GPIOTE module.

1 (Event): Event mode

3 (Task): Task mode
PSEL

GPIO number associated with SET[n], CLR[n], and OUT[n] tasks and IN[n] event
POLARITY

When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.

0 (None): Task mode: No effect on pin from OUT[n] task. Event mode: no IN[n] event generated on pin activity.

1 (LoToHi): Task mode: Set pin from OUT[n] task. Event mode: Generate IN[n] event when rising edge on pin.

2 (HiToLo): Task mode: Clear pin from OUT[n] task. Event mode: Generate IN[n] event when falling edge on pin.

3 (Toggle): Task mode: Toggle pin from OUT[n]. Event mode: Generate IN[n] when any change on pin.
OUTINIT

When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.

0 (Low): Task mode: Initial value of pin before task triggering is low

1 (High): Task mode: Initial value of pin before task triggering is high

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data